SM_VHDL.VHD template file for prelab exercises Logic Analyzer Videos (Zip) SM_TESTER.ZIP: Note that there is a different version for each of the two types of UP3 board below. Also, when you reach the step where the logic analyzer is connected, note Table 5.1, which CORRECTLY tells you which header pins to use on each board. for boards with EP1C6 FPGA for boards with EP1C12 FPGA VECTORS.MIF for each section: L01 L05 L02 L06 L03 L07 L04 L08 Other Logic Analyzer meterials normally not needed: Tektronix Quick Start Manual